In a magneto-resistive random access memory (MRAM) device, a plurality of memory cells (MRAM cells) are typically arranged at intersections of first and second conductive lines (e.g., bit and word lines) typically in intermediate positions thereof. Each of the MRAM cells generally comprise a magnetic structure (magnetoresistive tunnel junction or MTJ) where information is stored in form of directions of magnetization in a magnetic layer of the MTJ. Such stored information can be preserved for long periods of time without the need of further applying energy.
In general, the MTJ comprises two magnetic layers of different coercivity that are separated by an insulating tunneling barrier layer made of non-magnetic material. More particularly, magnetization of one of the magnetic layers (“reference layer”) is fixed or pinned, while magnetization of the other magnetic layer (“free layer”) is free to be switched between two preferred directions along a preferred axis (“easy axis”) of magnetization thereof.
Writing of logic information into an MRAM cell is accomplished by causing the magnetic material of the free layer to be magnetized in either one of the two directions along the preferred axis of magnetization, which typically is caused by coupling magnetic fields to the magnetic free layer. The magnetic fields typically are created passing currents through the first and second conductive lines. Changing directions of the magnetization of the free layer is also called a “writing or programming operation.”
Since a tunneling current through the MTJ is dependent on a relative orientation of the magnetizations in the magnetic layers thereof, reading of logic information (magnetic states) of an MRAM cell can be accomplished by sensing electrical resistance of the MTJ, for which purpose an electric voltage across the MTJ is applied.
A conventional process of manufacturing MRAM cells is now described referring to FIGS. 1 and 2 illustrating sectional views of intermediate products in a fabrication process thereof. While not illustrated in the drawings, typically and according to the afore-mentioned structure, a semiconductor substrate comprising active structures that have been processed beforehand (typically in a typical CMOS front-end-of-line processing) is provided, on which an interlevel dielectric is deposited. Then, a metallization level is formed within the interlevel dielectric material to form the first conductive lines, followed by deposition of an MTJ layered structure 10 which is to be structured for manufacturing a plurality of MTJ stacks, each of the latter functioning as memory element of the MRAM cells. The MTJ layered structure typically comprises a reference layer 1 on top of an antiferromagnetic layer 4 for pinning of the reference layer 1 fixed magnetization, a tunneling barrier layer 3 above the reference layer 1 and a free layer 2 above the tunneling barrier 3 (deposition in reverse order is also possible). Below the antiferromagnetic layer 4, electrically conductive layers can be deposited on the first conductive lines, for example a first conductive layer 6 made of TaN deposited on the first conductive lines and a second conductive layer 5 made of Ta deposited on the first conductive layer 6.
The reference layer 1 typically is made of thin films, for example, consisting of ferromagnetic alloys such as NiFe and CoFe with non-magnetic spacers of Ru, Re, Os, Nb, Cr or alloys thereof. The pinning (antiferromagnetic) layer 4 typically consists of platinum manganese (PtMn) or iridum manganese (IrMn). The free layer 2 typically is made of thin films, for example, ferromagnetic materials with or without non-magnetic spacers such as Ru, Re, Os, Nb, Cr or alloys thereof. The tunneling barrier layer 3 typically is made of Al2O3.
In the process of manufacturing MRAM cells, after depositing the MTJ layered structure 10 a cap structure 11 is formed thereupon. The cap structure 11 necessarily comprises a protective cap layer 7 formed over an upper magnetic layer (e.g. free layer 2) of the MTJ layered structure 10 that typically has a thickness of several hundred atomic layers, and which is to protect the MTJ layered structure 10 against exposure to the ambient, such as oxidation thereof. The cap layer 7 typically consists of a conductive material such as tantalum (Ta), tantalum nitride (TaN) or titanium nitride (TiN).
The cap structure 11 further comprises a hardmask layer 8 formed on the cap layer 7 to be subsequently opened for patterning of the MTJ stacks. Usually, a conductive material is used for the hardmask layer 8 which typically is the same or similar to the material of the cap layer 7, such as Ta, TaN or TiN, thus resulting in poor etch selectivity of the hardmask layer 8 with respect to the cap layer 7.
To transfer a lithographic pattern to the MTJ stacks, the hardmask layer 8 is patterned typically using reactive ion etching (RIE) down to the upper magnetic layer of the MTJ stack (i.e. opening of the hardmask layer and cap layer 7), followed by resist-strip and RIE of the MTJ stack.
For a good control of magnetic properties as well as enabling certain integration schemes it is necessary to stop the hardmask opening process reliably at the freelayer 2 surface without damaging the free layer 2, which, however, would require a very high etch selectivity (ca. more than 80) of the hardmask opening etch chemistry with respect to the free layer 2 material. However, according to the poor etch selectivity of the hardmask layer 8 with respect to the cap layer 7 as above-described, the free layer 2 magnetic material is very likely to be damaged in the hard mask opening process. Accordingly, in practical use, the hardmask open process is very sensitive to any non-uniformity over the wafer surface and typically works only with timed etch.
Particular reference is now made to FIG. 2 depicting that in opening the hardmask layer 8, due to poor etch selectivity of the hardmask layer 8 with regard to the cap layer 7, etch damage may occur in damage zones 9 of the MTJ layered stack 10, especially in the free layer 2.
In light of the above, there is a need to provide a new cap structure and a method of structuring same, while ensuring opening of the hardmask layer for patterning the MTJ stacks without causing damage to the MTJ layered structure.